View VRE4141K_777996.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

VRE4100 Series Low Cost, SOIC-8 Precision References
RHOPOINT COMPONENTS LTD *
Tel: +44 (0) 1883 717988 * Fax: +44 (0) 1883 712938 * Email: sales@rhopointcomponents.com Website: www.rhopointcomponents.com
FEATURES
* 1.024, 1.250, 2.048, 2.500, 4.096V Output * Initial Error: 0.05% max. * Temperature Drift: 1.0 ppm/C max.
NC 1 2 3 4 8 NC NC VREF NC
PIN CONFIGURATION
* Low Noise: 2.2Vp-p (0.1Hz-10Hz, 1.024V) * Low Thermal Hysterisis: 20ppm * 8mA Output Source * Power Down Mode * Industry Standard SOIC-8 pin out * Commercial and Industrial Temp Ranges * Second source for ADR29X, REF19X ,LT1460, LT1461, LT1798, MAX616X, REF102
+VIN Enable GND
VRE4100 TOP VIEW
7 6 5
FIGURE 1
SELECTION GUIDE Output Voltage V
1.024 1.024 1.024 1.250 1.250 1.250 2.048 2.048 2.048 2.500 2.500 2.500 4.096 4.096 4.096
DESCRIPTION
The VRE4100 is a low cost, high precision bandgap reference that operates from +5V. The device features low noise, digital error correction, and an SOIC-8 package. The ultrastable output is 0.05% accurate with a temperature coefficient as low as 1.0 ppm/C. The improvement in overall accuracy is made possible by using EEPROM registers and CMOS DAC's for temperature and initial error correction. The DAC trimming is done after assembly which eliminates assembly related shifts. The VRE4100 is recommended for use as a reference for 14, 16, or 18 bit data converters which require a precision reference. The VRE4100 offers superior performance over standard on-chip references commonly found with data converters. Model
VRE4110B VRE4110C VRE4110K VRE4112B VRE4112C VRE4112K VRE4120B VRE4120C VRE4120K VRE4125B VRE4125C VRE4125K VRE4141B VRE4141C VRE4141K
Temp. Coeff. ppm/C
1.0 2.0 3.0 1.0 2.0 3.0 1.0 2.0 3.0 1.0 2.0 3.0 1.0 2.0 3.0
Temp. Range C
0C to +70C 0C to +70C -40C to +85C 0C to +70C 0C to +70C -40C to +85C 0C to +70C 0C to +70C -40C to +85C 0C to +70C 0C to +70C -40C to +85C 0C to +70C 0C to +70C -40C to +85C
VRE4100DS REV. A MAY 01
ABSOLUTE MAXIMUM RATINGS
Power supply to any input pin .......-0.3V to +5.6V Operating Temp. (B,C) ....................0C to 70C Operating Temp. (K).....................-40C to 85C Storage Temperature Range........-65C to 150C Output Short Circuit Duration .......................Indefinite ESD Susceptibility Human Body Model.................2kV ESD Susceptibility Machine Model ....................200V Lead Temperature (soldering,10 sec)................260C
ELECTRICAL SPECIFICATIONS
Vps =+3V for VRE4110 and VRE4112, Vps =+5V for VRE4125, VRE4125 and VRE4141. T = 25C, Iload=1mA, Cout=1F unless otherwise noted.
PARAMETER Input Voltage Output Voltage Error
(Note 1)
SYMBOL VIN
CONDITIONS
MIN 1.8
TYP
MAX 5.5
UNITS V %
VRE4100B VOUT VRE4100C/K VRE4100B Output Voltage Temperature Coefficient
(Note 2)
0.025% 0.050% 0.040% 0.080% 0.5 1.0 1.5 160 2 2.2 20 50 230 1 20 0.8 2 0.4 1 320 20 200 1.0 2.0 3.0 235 mV s Vp-p ppm ppm A
ppm/mA
TCVOUT VIN -VOUT TON En
VRE4100C VRE4100K IL = 8 mA To 0.01% of final value 0.1Hzppm/C
Dropout Voltage (Note 3) Turn-On Settling Time Output Noise Voltage
(Note 4)
Temperature Hysterisis Long Term Stability Supply Current Load Regulation (Note 6) Line Regulation (Note 6) Logic High Input Voltage Logic High Input Current Logic Low Input Voltage Logic Low Input Current VOUT/T IIN VOUT/ IOUT VOUT/ VIN VH IH VL IL
1000 Hours Vload = 0mA 1mA ILoad 8mA VIN 5.5V
Vref + 200mV
ppm/V V nA V nA
Notes: 1. 2. 3. 4. 5. 6. High temperature and mechanical stress can effect the initial accuracy of the VRE4100 series references.See discussion on output accuracy. The temperature coefficient is determined by the box method. See discussion on temperature performance. All units are 100% tested over temperature. The minimum input to output differential voltage at which the output voltage drops by 0.5% from nominal. Based on 1.024V output. Noise is linearly proportional to VREF. Defined as change in 25C output voltage after cycling device over operating temperature range. Line and load regulation are measured with pulses and do not include output voltage changes due to self heating.
VRE4100DS REV. A MAY 01
TYPICAL PERFORMANCE CURVES
Load Regulation vs Temperature Output Voltage vs Load Current Load Transient Response
Line Regulation vs Temperature
Power Up/Down Ground Current
Line Transient Response
Enable Response
Output Impedance
Power Supply Rejection Ratio
VRE4100DS REV. A MAY 01
TYPICAL PERFORMANCE CURVES
Total Current (Is(ON)) vs Supply Voltage Total Current (Is(OFF)) vs Supply Voltage Ground Current vs Load Current
Output Voltage Change vs Sink Current I(SINK)
Dropout Voltage vs Load Current
IQ vs Temperature
Dropout Voltage vs Load Current (VOUT) = 2.0V
Spectral Noise Density (0.1Hz to 10Hz)
Spectral Noise Density (10Hz to 100kHz)
VRE4100DS REV. A MAY 01
BASIC CIRCUIT CONNECTION Figure 3 shows the proper connection of the VRE4100 series voltage reference. To achieve the specified performance, pay careful attention to the layout. Commons should be connected to a single point to minimize interconnect resistances. This will reduce voltage errors, noise pickup, and noise coupled from the power supply. TEMPERATURE PERFORMANCE The VRE4100 is designed for applications where the initial error at room temperature and drift over temperature are important to the user. For many instrument manufacturers, a voltage reference with a temperature coefficient of 1ppm/C makes it possible to eliminate a system temperature calibration, a slow and costly process. Of the three TC specification methods (slope, butterfly, and box), the box method is most commonly used. A box is formed by the min/max limits for the nominal output voltage over the operating temperature range. The equation follows:
PIN DESCRIPTION 4 2 3 1,5,7,8 6 GND Vin Enable NC Vout These must be connected to ground Positive power supply input Pulled to Vin for normal operation. This pin must be left open Reference output
+ VOUT + VIN
Enable 2 VRE4100 3 4 1,5,7,8 6 COUT 1F
NC
Figure 2
External Connections
T .C. =
Vmax - Vmin (106 ) Vno min al (Tmax - Tmin )
This method corresponds more accurately to the method of test and provides a closer estimate of actual error than the other methods. The box method guarantees limits for the temperature error but does not specify the exact shape or slope of the device under test. Figure 3
10000
For example a designer who needs a 14-bit accurate data acquisition system over the industrial temperature range (-40C to +85C), will need a voltage reference with a temperature coefficient (TC) of 1.0ppm/C if the reference is allowed to contribute an error equivalent to 1LSB. Figure 3 shows the required reference TC vs. T change from 25C for resolution ranging from 8 bits to 20 bits.
Reference TC vs. T change from 25C for 1 LSB change
1000
100 8 BIT
ReferenceTC (ppm/C)
10
10 BIT 12 BIT
1 14 BIT 16 BIT 0.1 18 BIT 0.01 1 10 20 BIT 100
VRE4100DS REV. A MAY 01
OPERATIONAL NOTES Input Capacitor An input capacitor is recommended on the VRE4100 device. A supply bypass capacitor on the input will assure that the reference is working from a low impedance source which will improve stability. It can improve the transient response when the load current is suddenly increased. Output Capacitor The VRE4100 requires a 1F output capacitor for loop stabilization (compensation) as well as transient response. When the load current changes, the output capacitor must source or sink current during the time it takes the control loop of the VRE4100 to respond. The output capacitor must meet the requirements of minimum capacitance and equivalent series resistance (ESR) range. See Capacitor Selection below. Capacitor Selection A minimum value of 0.2F over the operating temperature range is recommended. For a 0.22F capacitor the ESR range for 0C -70C is 0.9 to 6.0, 1.0F is 0.8 to 6.0, and 10F is 0.4 to 7.0. Surface mount tantalum capacitors offer small size for the value and ESR in the range required for the VRE4100. The optimum performance for the output capacitor is achieved with a 1.0F value. Aluminum electrolytic capacitors have a relatively large size for the value. They meet the ESR requirements at 1.0F as long as the temperature is above 0C. Below 0C, the ESR increases and it may exceed the limits indicated in the figures. Multilayer ceramic capacitors have a small size for the value, are available in surface mount, and have excellent RF characteristics. They may not meet the minimum ESR requirements and have a large change in value with temperature. Reverse Current Path The P-channel pass transistor used in the VRE4100 has an inherent diode connected between the Vin and VOUT pins. Forcing the output to voltages higher than the input or pulling Vin below the voltage stored in the output capacitor by more than the Vbe will forward bias this diode and current will flow from the Vout pin to Vin. This will not damage the VRE4100 as long as the current does not exceed 50mA. ON/OFF Operation The VRE4100 features a sleep mode that is activated by pulling the enable pin low. To turn the reference on, the enable pin is pulled high. If this feature is not used, the the enable pin should be tied to Vin to keep the reference on at all times. The enable pin must not be left unconnected (floating). When powered off, the VRE4100 will quickly reduce both Vout and IQ to zero. During power down, the charge across the output capacitor is discharged to ground through the internal circuitry. On power up, the Vout is restored in less than 200s. The signal source used to drive the enable pin can come from either a totem-pole output or an open collector output with a pull-up resistor to the VRE4100 input voltage. The signal source must be able to swing above and below the voltage thresholds to guarantee an ON or OFF state. It must not exceed the absolute maximum rating for the enable pin. Output Accuracy The output accuracy after assembly at room temperature is made up of three components: initial accuracy of the device, thermal hysterisis, and mechanical stress. The initial accuracy is measured at the factory and may not reflect the actual output voltage when the devices are mounted to a PCB. The effects of mechanical stress and thermal hysterisis can shift the output voltage. Thermal Hysterisis Thermal hysterisis is a change in output voltage as a result of a temperature change. When references experience a temperature change and return to the initial temperature, they do not always have the same initial voltage. Thermal hysterisis is difficult to correct and is a major error source in systems that experience temperature changes greater than 25C. Reference vendors are starting to include this important specification in their datasheets Mechanical Hysterisis Recommendations to minimize mechanical stress: 1) Mount the VRE4100 near the edges or corners of the PCB. The center of the board generally has the highest mechanical and thermal stress. 2) Mechanically isolate the device by cutting a U shaped slot around the VRE4100. This provides some mechanical and thermal isolation from the rest of the circuit.
VRE4100DS REV. A MAY 01
MECHANICAL SPECIFICATIONS
VRE4100DS REV. A MAY 01

▲Up To Search▲

Price & Availability of VRE4141K

	To Download VRE4141K Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .